GSI Technology has filed a patent for a memory device that includes multiple memory units and a global responder unit. The memory units consist of memory arrays that receive rotated input data for storage as data candidates. The patent claims a calculation row in the memory array that performs Boolean AND operations between bits of a marker row and bits of a data row. The responder unit generates a signal indicating the presence of a data candidate. The global responder unit receives signals from multiple responder units and performs Boolean OR operations on them. GlobalData’s report on GSI Technology gives a 360-degree view of the company including its patenting strategy. Buy the report here.

According to GlobalData’s company profile on GSI Technology, convolutional neural networks (CNNs) was a key innovation area identified from patents. GSI Technology's grant share as of September 2023 was 58%. Grant share is based on the ratio of number of grants to total number of patents.

Memory device with multiple memory units and global responder unit

Source: United States Patent and Trademark Office (USPTO). Credit: GSI Technology Inc

A recently filed patent (Publication Number: US20230317165A1) describes a memory device with unique features. The memory device consists of multiple memory units, each containing a memory array of memory cells arranged in rows and columns. The columns are defined by bit lines, and the memory array is designed to receive horizontal input data that is rotated for storage as data candidates in the columns.

One of the key aspects of this memory device is the presence of a calculation row in each memory unit. This calculation row receives per-bit-line Boolean AND operations between bits of a marker row and bits of a row of data candidates. The purpose of this calculation row is to identify a data candidate in the memory array based on predefined values. To achieve this, a responder (RSP) unit with wired-OR circuitry is included in the memory device. The wired-OR circuitry performs Boolean OR operations on the bit line data in the calculation row, generating a responder signal that indicates whether there is a cell in the calculation row with the predefined value.

Additionally, the memory device includes a global RSP unit that receives multiple responder signals from at least two RSP units. The global RSP unit performs Boolean OR operations on these multiple responder signals. This allows for efficient data processing and retrieval from the memory device.

The patent also mentions that the memory units in the device are distributed. Furthermore, there is a connection between these distributed memory units and the global RSP unit. This connection can be established using either wired or wireless communications, providing flexibility in the implementation of the memory device.

In summary, the filed patent describes a memory device with multiple memory units, each containing a memory array and a calculation row. The device utilizes wired-OR circuitry and Boolean operations to identify data candidates in the memory array. It also includes a global RSP unit for efficient data processing and retrieval. The memory units can be distributed and connected to the global RSP unit using either wired or wireless communications.

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GlobalData, the leading provider of industry intelligence, provided the underlying data, research, and analysis used to produce this article.

GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.