Advanced Micro Devices had 23 patents in cybersecurity during Q3 2023. Advanced Micro Devices Inc has filed three patents during Q3 2023.

The first patent describes an integrated circuit that maintains a communication link with a host computer. It includes a queue to receive host commands and a processor to execute a device runtime. The processor validates the host commands and selectively executes them based on the validation result. The host commands manage functions of the integrated circuit, and the queue is shared by the integrated circuit and the host computer.

The second patent discusses partitioning hardware and software in a system on a chip (SoC) into a hierarchy. This hierarchy has three levels, allowing for security and safety isolation. The levels cover the processor subsystem with shared or divided compute, memory, acceleration, and peripheral resources.

The third patent introduces methods and apparatus for adaptive integrity levels in electronic and programmable logic systems. It provides an interface that can change the integrity level for communication between two components during their operation. GlobalData’s report on Advanced Micro Devices gives a 360-degreee view of the company including its patenting strategy. Buy the report here.

Advanced Micro Devices grant share with cybersecurity as a theme is 30% in Q3 2023. Grant share is based on the ratio of number of grants to total number of patents.

Recent Patents

Application: Extensible device hosted root of trust architecture for integrated circuits (Patent ID: US20230259627A1)

This patent application by Advanced Micro Devices Inc. describes an integrated circuit that includes a communication endpoint, a queue, and a processor. The communication endpoint maintains a communication link with a host computer, and the queue receives host commands from the host computer via the communication link. The processor, which operates as a Root of Trust (RoT) for the integrated circuit, executes firmware and performs validation of the host commands read from the queue. Based on the validation result, the processor selectively executes the host commands on a per host command basis. The host commands manage functions of the integrated circuit, and the queue is implemented in a shared region of memory between the integrated circuit and the host computer.

The firmware executed by the processor can be extended to include a custom application that accesses the functions of the firmware through an application programming interface. The integrated circuit also includes an out-of-band communication channel, and the processor can enable or disable functions of the integrated circuit during runtime in response to receiving administrative commands over the out-of-band communication channel. The integrated circuit further includes circuit blocks and control registers that directly control the operation of the circuit blocks. The host computer is prevented from directly accessing the control registers, and instead, accesses them indirectly by submitting host commands to the queue for execution by the processor.

Additionally, the integrated circuit includes internal status registers that store runtime status information. The host computer is prevented from directly accessing these registers and can only obtain the runtime status information indirectly by submitting host commands to the queue. The processor can also validate configuration data specified in a host command by copying the data to a region of memory available only to the processor, validating it, and then instructing a platform loader to load the configuration data into the appropriate memory or registers of the integrated circuit. The processor can validate the configuration data using certificates stored within a memory accessible only by the processor.

In summary, this patent application describes an integrated circuit that uses a queue to receive host commands from a host computer and a processor to selectively execute these commands based on validation results. The integrated circuit provides secure access to control registers, status registers, and configuration data, preventing direct access by the host computer.

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GlobalData, the leading provider of industry intelligence, provided the underlying data, research, and analysis used to produce this article.

GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.