ams OSRAM has been granted a patent for a digital-to-analog converter (DAC) designed for use in an incremental analog-to-digital converter (iADC). The DAC includes a mismatch shaping logic block, output elements generating analog portions based on a selection vector, and a signal combiner for the analog feedback signal. GlobalData’s report on ams OSRAM gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on ams OSRAM, Smart lighting was a key innovation area identified from patents. ams OSRAM's grant share as of February 2024 was 51%. Grant share is based on the ratio of number of grants to total number of patents.
Digital-to-analog converter for incremental analog-to-digital converter
A recently granted patent (Publication Number: US11929759B2) discloses a digital-to-analog converter (DAC) designed for use in an incremental analog-to-digital converter (iADC). The DAC is equipped with a mismatch shaping logic block that generates a selection vector based on a multi-bit word representing an integer within a specific range. The DAC includes multiple output elements that produce analog portions based on the selection vector, which are then combined into an analog feedback signal by a signal combiner. Additionally, the DAC features a unique configuration where successive weight factors decrease in each clock period during the conversion cycle of the iADC, following a monotonically decreasing function.
Furthermore, the patent details the intricate design of the DAC, including switching blocks with dividers, selectors, and adders to split the multi-bit word into preliminary sub-portions and select the appropriate sub-portion based on the weight accumulator's sign. The DAC also incorporates a weight generator that provides decreasing weight factors for each clock period within the conversion cycle of the iADC. The weight generator utilizes integration stages to process digital input signals and feedback, ultimately generating the necessary weight factors. This innovative approach aims to enhance the efficiency and accuracy of the digital-to-analog conversion process within the iADC, ultimately improving the overall performance of the electronic device incorporating this technology, especially in applications requiring precise analog-to-digital conversion of sensor signals.
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