Atomera has filed a patent for a method of making a semiconductor device. The method involves forming a superlattice with stacked groups of layers, including base semiconductor monolayers and non-semiconductor monolayers. The superlattice is selectively etched to remove semiconductor atoms and accumulate non-semiconductor atoms. An active semiconductor device layer is then grown above the semiconductor layer, and circuits are formed in the epitaxially grown layer. GlobalData’s report on Atomera gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Atomera, quantum dot devices was a key innovation area identified from patents. Atomera's grant share as of June 2023 was 1%. Grant share is based on the ratio of number of grants to total number of patents.
Method for making a semiconductor device with a superlattice
A recently filed patent (Publication Number: US20230136797A1) describes a method for making a semiconductor device using a superlattice structure. The method involves forming a superlattice above a semiconductor layer, which consists of multiple stacked groups of layers. Each group of layers includes stacked base semiconductor monolayers and at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions. The superlattice is then selectively etched to remove semiconductor atoms and cause non-semiconductor atoms to accumulate adjacent to the semiconductor layer.
After the selective etching, an active semiconductor device layer is epitaxially grown above the semiconductor layer and the accumulated non-semiconductor atoms. Finally, at least one circuit is formed in the epitaxially grown active semiconductor device layer. This may involve creating spaced apart source and drain regions, as well as forming a gate that defines a channel region between the source and drain regions.
The patent also mentions the possibility of forming additional superlattices between the semiconductor layer and the superlattice layer. These additional superlattices would have a similar structure to the main superlattice, with stacked base semiconductor monolayers and at least one non-semiconductor monolayer constrained within the crystal lattice.
The selective etching process can be performed using either chemical etching or plasma etching techniques. The accumulated non-semiconductor atoms may comprise at least one full monolayer of non-semiconductor atoms. The non-semiconductor monolayers mentioned in the patent include oxygen, nitrogen, fluorine, carbon, and carbon-oxygen.
The base semiconductor layers in the superlattices are primarily composed of silicon. This indicates that the method described in the patent is specifically focused on silicon-based semiconductor devices.
In summary, the patent describes a method for making a semiconductor device using a superlattice structure. The method involves selectively etching the superlattice, epitaxially growing an active semiconductor device layer, and forming circuits within the epitaxially grown layer. The use of non-semiconductor monolayers within the superlattice structure allows for the accumulation of non-semiconductor atoms, which can potentially enhance the performance of the semiconductor device.
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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
