Cadence Design Systems has been granted a patent for a method that enables multi-threaded network routing of a circuit design by partitioning networks and scheduling routing tasks to available threads. This innovative approach minimizes idle time and ensures efficient routing of circuit designs. GlobalData’s report on Cadence Design Systems gives a 360-degree view of the company including its patenting strategy. Buy the report here.

According to GlobalData’s company profile on Cadence Design Systems, Manufacturability analysis was a key innovation area identified from patents. Cadence Design Systems's grant share as of February 2024 was 87%. Grant share is based on the ratio of number of grants to total number of patents.

Multi-threaded network routing for circuit design

Source: United States Patent and Trademark Office (USPTO). Credit: Cadence Design Systems Inc

A recently granted patent (Publication Number: US11928500B1) discloses a method and device for efficiently routing networks in a circuit design. The method involves accessing circuit design data, generating a tree data structure by partitioning and grouping networks, and routing the networks using multiple threads based on the tree structure. The process includes determining initial bounding boxes, partition lines, and moving networks between groups based on certain conditions. Additionally, the method iteratively partitions groups of networks based on thresholds and conditions, ensuring efficient routing of the networks.

The device described in the patent includes a hardware processor and memory storing instructions to generate the tree data structure and perform network routing. Similar to the method, the device iteratively partitions and groups networks, determines thresholds for grouping, and efficiently routes networks using multiple threads. The device's operations involve identifying groupings of networks, determining conditions for further partitioning, and moving networks between groups based on partition lines. By utilizing a tree data structure and multiple threads, the device ensures effective routing of networks in a circuit design, enhancing overall efficiency and performance in network routing processes.

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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.