Microchip Technology has been granted a patent for an architecture that enables a physical layer device to operate in a sleep mode and control other devices in a network segment to also operate in a sleep mode. The device supports partial networking in a multidrop network and mixed networks. The patent also describes an apparatus with transmission/reception circuitry, core logic, and power management logic for interfacing with a shared bus. The device exhibits different states based on the supply of power to the interruptible power domain. GlobalData’s report on Microchip Technology gives a 360-degree view of the company including its patenting strategy. Buy the report here.

According to GlobalData’s company profile on Microchip Technology, Adaptive video coding was a key innovation area identified from patents. Microchip Technology's grant share as of September 2023 was 59%. Grant share is based on the ratio of number of grants to total number of patents.

Physical layer device for sleep mode and power management

Source: United States Patent and Trademark Office (USPTO). Credit: Microchip Technology Inc

A recently granted patent (Publication Number: US11775045B2) describes an apparatus and system for power management in a network. The apparatus includes transmission/reception circuitry, core logic, and power management logic. The transmission/reception circuitry and core logic operate in different power states based on the supply of power to the interruptible power domain. The power management logic enables and disables the supply of power to the interruptible power domain based on various factors such as a valid wakeup signal and valid bus activity.

The apparatus also includes sensing circuitry to detect a wakeup signal and enable the supply of power to the interruptible power domain in response to the detected signal. The power management logic can disable the supply of power to the interruptible power domain based on a sleep control signal, an inactive input assigned to receive a wakeup signal, or an inactive bus.

The system described in the patent includes a first station controller and a first physical layer device that interfaces the first station controller with a shared bus. The first physical layer device enables and disables the supply of power to the first station controller and the interruptible power domain. The system may also include additional equipment and a network segment to connect the equipment to a network.

The power management logic in the first physical layer device can be controlled by a core logic associated with the interruptible power domain. The system may also include a switch to provide an interruptible path for supplying power to the equipment.

The patent also describes a method for power management in a station. The method involves disabling the supply of power to a first power domain of the station in response to a sleep control signal or an observed signal indicative of bus inactivity. Power is continued to be supplied to a second power domain of the station while the supply to the first power domain is disabled. The method also includes supplying power to the first power domain in response to a wakeup signal or a signal indicative of valid bus activity.

Overall, the granted patent presents an apparatus, system, and method for efficient power management in a network, allowing for power control based on various factors and enabling power supply to specific domains as needed.

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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.