Rambus has been granted a patent for a memory module with a command buffer IC that buffers memory commands. The command buffer IC includes interface circuits to receive and output commands based on pre-programmed patterns, enhancing memory operation efficiency. GlobalData’s report on Rambus gives a 360-degree view of the company including its patenting strategy. Buy the report here.
According to GlobalData’s company profile on Rambus, M2M communication interfaces was a key innovation area identified from patents. Rambus's grant share as of January 2024 was 69%. Grant share is based on the ratio of number of grants to total number of patents.
Command buffer for memory modules with pre-programmed command sequences
A recently granted patent (Publication Number: US11886360B2) discloses a command buffer system designed to efficiently process memory commands. The system includes an input circuit to receive input memory commands, a reference pattern memory to store reference command patterns associated with output command sequences, a pattern matching circuit to identify matching reference command patterns, and a sequence selector circuit to output the corresponding output command sequence for memory operations. The system can be further programmed with reference patterns and output sequences, with capabilities to control both volatile and non-volatile memory operations, including data transfer between memory types.
Moreover, the patent also details a method for operating the command buffer system, involving receiving input memory commands, storing reference command patterns, identifying matching patterns, and outputting corresponding command sequences for memory operations. The method includes programming the system with reference patterns and output sequences, controlling volatile memory operations, and managing non-volatile memory controller circuits. The system can facilitate data transfer between volatile and non-volatile memory, enhancing memory operation efficiency. This innovative technology could find applications in memory devices, particularly in co-packaged systems with volatile memory, and NVM controller circuits, offering improved memory management capabilities.
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