Realtek Semiconductor has been granted a patent for a signal transmission system that includes a receiver decoding apparatus and a transmitter encoding apparatus. The system utilizes various decoders, encoders, and demultiplexers to decode and encode digital signals of different bit lengths, allowing for efficient signal transmission. GlobalData’s report on Realtek Semiconductor gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Realtek Semiconductor, M2M communication interfaces was a key innovation area identified from patents. Realtek Semiconductor's grant share as of September 2023 was 74%. Grant share is based on the ratio of number of grants to total number of patents.
Signal transmission system with encoding and decoding apparatus
A recently granted patent (Publication Number: US11777765B2) describes a signal transmission system that aims to improve the efficiency and reliability of data transmission. The system includes a transmitter encoding apparatus and a receiver decoding apparatus.
The transmitter encoding apparatus consists of a multiplexer that receives two digital signals and generates an output. The output comprises multiple M-bit code words of the first digital signal and multiple M-bit code words of the second digital signal, arranged in an interleaved manner. The output is then encoded by a first transmitter encoder to generate a plurality of N-bit code words. The first transmitter encoder determines the current N-bit code word based on the output of the multiplexer and the disparity of the previous N-bit code word. The receiver decoding apparatus, coupled to the transmitter encoding apparatus, includes a first receiver decoder that decodes the N-bit code words to generate a plurality of I-bit code words. These I-bit code words are then deinterleaved and assigned to output terminals by a demultiplexer. Additionally, a second transmitter encoder outputs a third digital signal and a fourth digital signal, where the K-bit code words of both signals have the same number of ones and zeros.
The first transmitter decoder decodes the third and fourth digital signals to generate the first and second digital signals, respectively. The system also includes a first receiver encoder that encodes the outputs of the demultiplexer to generate a fifth digital signal and a sixth digital signal. The J-bit code words of both signals have the same number of ones and zeros. These signals are then decoded by a second receiver decoder.
The patent also describes a receiver decoding apparatus that includes a first receiver decoder, a demultiplexer, a first receiver encoder, and a second receiver decoder. The first receiver decoder decodes N-bit code words to generate I-bit code words, which are then deinterleaved and assigned to output terminals by the demultiplexer. The first receiver encoder encodes the outputs of the demultiplexer to generate a fifth and sixth digital signal, where the J-bit code words of both signals have the same number of ones and zeros. The second receiver decoder decodes these signals.
Overall, this patent presents a signal transmission system that utilizes encoding and decoding algorithms to improve the efficiency and reliability of data transmission. The system aims to reduce errors and optimize the use of available bandwidth.
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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
