VIA Technologies has been granted a patent for a USB integrated circuit, testing platform, and operating method. The circuit includes a USB PHY circuit, lane adapters, routing circuit, and USB transport layer circuit. The routing circuit switches between testing and working modes by connecting the appropriate lane adapter to the USB PHY circuit. GlobalData’s report on VIA Technologies gives a 360-degree view of the company including its patenting strategy. Buy the report here.

According to GlobalData’s company profile on VIA Technologies, Device power optimization was a key innovation area identified from patents. VIA Technologies's grant share as of February 2024 was 83%. Grant share is based on the ratio of number of grants to total number of patents.

Usb integrated circuit with testing and working mode switching capabilities

Source: United States Patent and Trademark Office (USPTO). Credit: VIA Technologies Inc

A recently granted patent (Publication Number: US11914491B2) discloses a USB integrated circuit designed for efficient testing and operation modes. The integrated circuit includes a first USB port physical layer circuit for transmitting signals, a routing circuit that connects different lane adapters based on the operating mode (testing or working), and a USB transport layer circuit. In testing mode, the routing circuit connects the first lane adapter to the USB port physical layer circuit, while in working mode, it connects the second lane adapter. The circuit supports a pulse-amplitude modulation signal with three level states and converts the differential signal into a ternary digital signal.

Moreover, the patent details a testing platform for testing the USB integrated circuit, comprising a testing machine generating test patterns and a USB integrated circuit receiving downstream signals conforming to USB4 V2 specification. The platform includes multiple lane adapters, USB port physical layer circuits, and a routing circuit for seamless operation during testing. The differential signal is converted into a ternary digital signal, and the transport layer packages are transmitted to corresponding third lane adapters. The method also involves filling rows of transport layer packages with digital signals sequentially through the first lane adapter, enhancing the testing process efficiency and accuracy. This patent showcases advancements in USB integrated circuit technology, particularly in testing procedures and operational modes, ensuring optimal performance and functionality.

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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.