Infineon Technologies has been granted a patent for a method of operating a semiconductor device. The method involves coupling digital inputs to non-volatile memory cells, initiating read operations, accumulating weighted currents, and converting these into scaled charges, ultimately generating a digital output based on the accumulated charges. GlobalData’s report on Infineon Technologies gives a 360-degree view of the company including its patenting strategy. Buy the report here.

According to GlobalData’s company profile on Infineon Technologies, Under-screen biometric identification was a key innovation area identified from patents. Infineon Technologies's grant share as of June 2024 was 65%. Grant share is based on the ratio of number of grants to total number of patents.

Semiconductor device operation method using non-volatile memory

Source: United States Patent and Trademark Office (USPTO). Credit: Infineon Technologies AG

The patent US12045714B2 outlines a method and device for operating a semiconductor device, specifically focusing on a multiply-and-accumulate (MAC) architecture that utilizes non-volatile memory (NVM) cells. The method involves coupling digital inputs to corresponding rows of NVM cells, initiating read operations based on the digital values of these inputs, and accumulating weighted bit-line currents from the NVM cells. Each cell stores an individual weight, and the accumulated currents are converted and scaled to generate output charges. This process is repeated for each bit of the digital inputs, allowing for the generation of a digital output based on the summation of the scaled charges. The architecture also includes charge-storage banks for storing output charges and an analog-to-digital converter (ADC) for converting these charges into digital outputs.

The MAC device described in the patent features an array of multi-level memory cells, registers for receiving digital inputs, and charge-storage banks that facilitate the conversion and scaling of accumulated currents. The device operates without a digital-to-analog converter between the registers and memory cells, enhancing efficiency. The system is designed to support artificial intelligence (AI) applications, with multiple MAC cores interconnected to process digital inputs and generate outputs that reflect the weighted summation of these inputs. The architecture emphasizes the significance of the most and least significant bits in the scaling process, ensuring that the output accurately represents the input data's weighted contributions. Overall, the patent presents a novel approach to semiconductor device operation, particularly in the context of AI accelerators.

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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.