Intel had 92 patents in big data during Q2 2024. Intel Corp’s Q2 2024 patents include circuitry for NVMe bounce buffer allocation and address translation, a graphics processor with memory access circuitry for caching pixel data, UE trajectory-assisted handovers using AI/ML, integrated circuit devices with network processor and on-package memory, and Ethernet PHY circuitry for auto-negotiation with a link partner. GlobalData’s report on Intel gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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Intel had no grants in big data as a theme in Q2 2024.
Recent Patents
Application: Buffer allocation (Patent ID: US20240211392A1)
The patent filed by Intel Corp. describes circuitry designed to allocate an NVMe bounce buffer in virtual memory associated with an NVMe command and perform address translation based on the response received from an NVMe target. The circuitry is capable of translating virtual addresses to physical addresses for the NVMe bounce buffer upon receiving a response from the NVMe target, ensuring efficient memory management and data transfer processes.
The patent includes claims for a computer-readable medium with instructions for allocating NVMe bounce buffers, configuring network interface devices, and deallocating buffers based on completion indicators. It also covers the allocation of dummy bounce buffers, translation of addresses post-response processing, and handling of NVMe read and write commands. Additionally, the patent describes an apparatus with circuitry for buffer allocation and deallocation based on target responses, as well as a method for managing memory in a computing system by allocating Physical Buffer Lists just-in-time and enabling access to RDMA circuitry without pre-allocating memory buffers. These innovations aim to optimize memory usage, enhance data transfer efficiency, and improve overall system performance.
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