Intel has unveiled technical specifications for its upcoming client processor, the Core Ultra series 3, known internally as Panther Lake.

According to Intel, Panther Lake is the first processor fabricated using the company’s 18A process node, a 2nm class technology developed and manufactured in the US.

Initial shipments of Panther Lake are scheduled for later in 2025, with wider commercial availability planned for January 2026.

The processor will be produced at Fab 52 in Chandler, Arizona.

Panther Lake incorporates a multi-chiplet system-on-chip architecture and is built to serve a range of applications, including AI PCs, gaming systems, and edge deployments.

It features up to 16 combined performance and efficient cores, and an integrated Intel Arc graphics processing unit (GPU) with up to 12 Xe cores.

According to Intel’s internal measurements, Panther Lake delivers over 50% improvement in CPU and graphics performance compared to previous generations and supports up to 180 trillions of operations per second (TOPS) for AI workloads.

The platform also extends to edge computing, such as robotics, with Intel providing a dedicated robotics AI software suite and reference board.

Intel CEO Lip-Bu Tan said: “We are entering an exciting new era of computing, made possible by great leaps forward in semiconductor technology that will shape the future for decades to come.

“Our next-gen compute platforms, combined with our leading-edge process technology, manufacturing and advanced packaging capabilities, are catalysts for innovation across our business as we build a new Intel.”

In the data centre segment, Intel previewed Clearwater Forest, the company’s next generation Xeon server processor, branded as Xeon 6+.

Also based on the Intel 18A process node, Xeon 6+ is set for release in the first half of 2026. It offers up to 288 efficient cores and is claimed to deliver a 17% increase in instructions per cycle versus its predecessor.

Clearwater Forest targets hyperscale data centres, cloud providers, and telecommunications environments requiring high workload density and efficiency.

The Intel 18A process node introduces RibbonFET transistors and PowerVia backside power delivery. These additions allow for higher chip density and improved energy efficiency compared to earlier Intel nodes.

The manufacturing flow leverages Foveros packaging technology, enabling stacking and integration of multiple chiplets in one package.

Fab 52 represents an expansion of Intel’s US manufacturing infrastructure, joining research and development (R&D) facilities in Oregon and packaging operations in New Mexico.

The company’s investment in Arizona forms part of a $100bn plan to expand domestic semiconductor production capacity.

In September 2025, Nvidia plans to invest $5bn in Intel to co-develop custom data centres and PC products. This follows the US government’s recent $8.9bn investment in Intel to enhance domestic semiconductor manufacturing.