Microsoft is preparing to scale its custom Azure Maia accelerator family to multi-gigawatt data centre deployments beginning in 2027, positioning the silicon as the primary inference platform across its products and services.
Scott Guthrie, executive vice president of Cloud + AI at Microsoft, disclosed the expansion alongside confirmation that the current-generation Maia 200 chip has entered production.
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The accelerator is already handling workloads for Microsoft Copilot and supporting the MAI team in developing next-generation models, with GitHub Copilot and Microsoft Foundry set to run on the hardware before the end of the year.
Maia 200 is being rolled out across data centres in the US, Europe and Australia.
According to Guthrie, the chip achieves up to 1.7 times greater token output per watt when powering integrated AI features in Microsoft Teams, Copilot and Cowork, measured against leading graphics processing unit (GPU) infrastructure. It supports OpenAI models, Microsoft’s proprietary MAI models and prominent open-source model families.
The forthcoming Maia 300, which Microsoft characterises as a complete intelligent system, has been built specifically around emerging inference demands such as long-context reasoning, low-latency conversational interactions and sustained multi-step agentic tasks.
Microsoft expects the chip to generate 40% more tokens per megawatt than leading GPU-based systems. In a full 96-accelerator rack arrangement, Maia 300 delivers up to seven times the rack-scale token throughput of its predecessor.
Guthrie wrote: “The future will not be defined by a single model or a single piece of silicon or a single innovation.
“Our focus is on developing responsible, affordable and scalable platforms that will help everyone amplify their intelligence to drive breakthrough outcomes that matter for them.”
Operational learnings from running Maia 200 at scale directly shaped the successor’s architecture.
Both chip generations are intended to serve a range of additional Microsoft services. These span more efficient coding workflows through GitHub, cloud-scale model hosting via Microsoft Foundry, inference for the MAI research team and latency-sensitive clinical applications through Dragon Copilot.
On the hardware level, Maia 300 adopts a multi-chiplet design with compute elements fabricated on TSMC’s N2P process node. The chip integrates eight HBM4 stacks that collectively provide up to 18.0 TB/s of peak memory throughput, all within a 950-watt thermal design power rating.
At rack level, 96 accelerators fit inside a 167-kilowatt power envelope, offering 27.6 TB of combined HBM capacity and 1.7 PB/s of aggregate memory bandwidth.
Microsoft said the architecture introduces a software-defined dataflow approach coupled with AI-assisted kernel optimisation, aimed at maximising data locality and cutting unnecessary transfers across compute, memory and network resources.
Compatibility with advanced low-precision number formats, including an enhanced version of MXFP4, is designed to support larger context windows and higher throughput without increasing power consumption.
In June 2026, Microsoft unveiled Majorana 2, a topological quantum chip built on a new materials stack with qubits that the company says are 1,000 times more reliable than those in its predecessor.
