NXP Semiconductors has been granted a patent for a power management system that includes a capacitor, control logic to determine wait time based on voltage comparison, and a control circuit for charging and discharging the capacitor. The system aims to optimize power usage efficiently. GlobalData’s report on NXP Semiconductors gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on NXP Semiconductors, Quantum dot devices was a key innovation area identified from patents. NXP Semiconductors's grant share as of May 2024 was 51%. Grant share is based on the ratio of number of grants to total number of patents.
Power management system with capacitor, control logic, and circuit
A recently granted patent (Publication Number: US12001257B2) discloses a power management system that includes a capacitor, control logic, and a control circuit. The control logic determines a wait time based on the capacitor's voltage compared to a threshold voltage and initiates a startup sequence once the wait time expires. The control circuit is responsible for charging and discharging the capacitor, with components like a discharge circuit, charge circuit, and trigger circuit integrated within it. The system can be implemented within a Power Management Integrated Circuit (PMIC), with options for the capacitor to be internal or external to the PMIC, depending on the configuration.
Furthermore, the patent also covers a method for power management involving charging the capacitor once the PMIC's voltage rails are supplied, followed by a startup sequence after a power loss. This sequence includes comparing the capacitor's voltage to a threshold, determining a wait time for system startup, and initiating the startup after the wait time elapses. The method also includes specific actions like opening switches in the discharge, charge, and trigger circuits to control the capacitor's functions. Additionally, the patent extends to a PMIC itself, with control logic and a control circuit for managing the capacitor's voltage and initiating system startups based on the wait time determined by the voltage comparison. The PMIC may include a pin for connecting to the capacitor and bases the wait time calculation on the capacitor's voltage level.
To know more about GlobalData’s detailed insights on NXP Semiconductors, buy the report here.
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