Synopsys has been granted a patent for a method that involves extracting constraints and clock information from a circuit design file, creating overlapping partitions, determining a topological cone, and conducting timing analysis. This innovative approach enhances static timing analysis processes. GlobalData’s report on Synopsys gives a 360-degree view of the company including its patenting strategy. Buy the report here.

According to GlobalData’s company profile on Synopsys, AI assisted CAD was a key innovation area identified from patents. Synopsys's grant share as of February 2024 was 75%. Grant share is based on the ratio of number of grants to total number of patents.

Method for static timing analysis in circuit design

Source: United States Patent and Trademark Office (USPTO). Credit: Synopsys Inc

A recently granted patent (Publication Number: US11922106B2) discloses a method for static timing analysis in circuit design. The method involves extracting information related to constraints and clock details from a circuit design file, scanning the design for timing constraints while partitioning it, determining a topological cone for each partition, and conducting timing analysis based on this cone. The method also includes associating global and local identifications with objects across multiple partitions, linking the design to technology libraries, and incorporating logic augmentation for improved analysis accuracy.

Furthermore, the patent describes a system implementing the method, comprising a processor and memory storing instructions for extracting information, determining the topological cone, and performing timing analysis. The system is designed to handle complex circuit designs by associating identifications with objects, conducting logic augmentation, and incorporating dangling stage logic for a comprehensive analysis. Additionally, the system can share extracted information with other processors, enabling collaborative analysis across multiple partitions. Overall, the patented method and system offer a sophisticated approach to static timing analysis in circuit design, enhancing accuracy and efficiency in the process.

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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.