Advanced Micro Devices had 11 patents in digitalization during Q1 2024. AMD’s patents in Q1 2024 focus on reducing communication latency through data integrity checks and utilizing a virtual padding unit to provide output values for a padded data structure without storing all padding elements in memory. The data integrity checks involve transmitting data with overlapping integrity tags for subsets of data blocks, while the virtual padding unit determines whether a location in the virtual padded data structure is padded or non-padded to output the appropriate value. These innovations aim to improve efficiency and reduce latency in data communication processes. GlobalData’s report on Advanced Micro Devices gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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Advanced Micro Devices grant share with digitalization as a theme is 63% in Q1 2024. Grant share is based on the ratio of number of grants to total number of patents.
Recent Patents
Application: Offset data integrity checks for latency reduction (Patent ID: US20240095404A1)
The patent filed by Advanced Micro Devices Inc. describes a method for reducing communication latency by implementing data integrity checks during data transmission. The method involves generating integrity tags for subsets of data blocks, with the tags overlapping and being offset based on computational complexities. These integrity tags are used by the receiving endpoint to validate the authenticity of the received data, allowing for the release of data blocks covered by both tags for use. By generating and validating additional integrity tags for subsequent subsets of data blocks, latency is reduced by offsetting the times at which comparison tags are generated and validated.
The method outlined in the patent involves the transmission of data in multiple blocks, each associated with integrity tags that are generated based on computational complexities and data storage formats. The receiving endpoint generates comparison tags for each subset of data blocks, allowing for the validation of data authenticity. The release of data blocks for use is contingent upon the successful validation of integrity tags, with the method aiming to optimize data communication and reduce latency by strategically offsetting the generation and validation of comparison tags.
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