Synopsys has filed a patent for systems and methods to assign nodes in a circuit design to layers. The method involves identifying structures in the circuit design, removing pairs of connected nodes from the structures to form a reduced node structure, and assigning circuit layers for the nodes in the reduced structure. The patent aims to improve the efficiency of assigning layers in circuit designs. GlobalData’s report on Synopsys gives a 360-degree view of the company including its patenting strategy. Buy the report here.
Smarter leaders trust GlobalData
According to GlobalData’s company profile on Synopsys, AI assisted CAD was a key innovation area identified from patents. Synopsys's grant share as of September 2023 was 75%. Grant share is based on the ratio of number of grants to total number of patents.
Method for assigning layers to nodes in a circuit design
A recently filed patent (Publication Number: US20230315967A1) describes a method and system for determining layers for nodes in a circuit design. The method involves identifying structures in the circuit design, where each structure consists of four nodes connected to every other node in the structure. An even number of pairs of connected nodes are then removed from the structures to create a reduced node structure. Circuit layers are assigned to the nodes in the reduced structure, and the pairs of connected nodes that were removed are assigned circuit layers based on the layers assigned to the nodes in the reduced structure.
The patent also includes additional claims and variations of the method and system. For example, the pairs of connected nodes can be shared by two structures, and certain pairs of connected nodes at the ends of the structures may be retained instead of being removed. In this case, the circuit layers assigned to the retained pairs of nodes can be used as a reference for assigning layers to other pairs of connected nodes. The method also allows for assigning different circuit layers to the first and second nodes in each pair of connected nodes.
The system described in the patent includes a memory and a processor that can perform the steps of the method. The processor identifies structures, removes pairs of connected nodes, assigns circuit layers, and performs lithography based on the assigned layers.
In addition to the method and system, the patent also covers a non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to perform the steps of the method.
Overall, this patent presents a method and system for determining layers for nodes in a circuit design, which can be useful in optimizing circuit layouts and improving circuit performance.
To know more about GlobalData’s detailed insights on Synopsys, buy the report here.
Data Insights
From
The gold standard of business intelligence.
Blending expert knowledge with cutting-edge technology, GlobalData’s unrivalled proprietary data will enable you to decode what’s happening in your market. You can make better informed decisions and gain a future-proof advantage over your competitors.
GlobalData, the leading provider of industry intelligence, provided the underlying data, research, and analysis used to produce this article.
GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
