Global Foundries had four patents in artificial intelligence during Q2 2024. Global Foundries Inc has developed structures for in-memory processing, including in-memory serial processing and in-memory pipeline processing. These structures involve memory banks with programmable resistors, feedback buffers, amplifiers, and track-and-hold devices to facilitate efficient processing and minimize errors. The structures allow for the storage of layer-specific weight values and the generation of outputs for each processing layer, enhancing the overall performance of in-memory processing systems. GlobalData’s report on Global Foundries gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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Global Foundries had no grants in artificial intelligence as a theme in Q2 2024.
Recent Patents
Application: Partitioned memory architecture and method for repeatedly using the architecture for multiple in-memory processing layers (Patent ID: US20240119975A1)
The patent filed by Global Foundries Inc. describes a structure for in-memory processing that includes memory banks arranged in columns and rows, with each bank containing cells connected to bank input nodes and bitlines. These cells have layer-specific memory elements that can store weight values and are individually programmable. The structure allows for feedback from one processing layer to be used as inputs for the next layer, with memory elements being connected to the corresponding bank input nodes and bitlines for each iteration of processing.
The patent includes multiple claims detailing the structure, components, and functionalities of the in-memory processing system. These claims cover aspects such as the arrangement of memory banks, the use of programmable resistors in cells for storing weight values, the inclusion of track-and-hold devices in initial memory banks, feedback buffer circuits for biasing bitlines, and the generation of output currents based on the sum of programmable resistor outputs. The patent also describes the use of column interconnect lines, voltage buffers, current-to-voltage converters, and subtractors for processing data and computing dot products efficiently. Overall, the patent outlines a comprehensive system for in-memory processing that can be utilized for various applications requiring efficient and high-performance computing capabilities.
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