Taiwan Semiconductor Manufacturing had 12 patents in cybersecurity during Q2 2024. The patents filed by Taiwan Semiconductor Manufacturing Co Ltd in Q2 2024 focus on physical unclonable function (PUF) generator circuits and memory systems. These inventions include input/output circuits for PUF generators, memory systems with authentication circuits based on memory cell logic states, methods for protecting PUF generators from voltage tampering events, and memory devices with MAC circuits and encoder-decoder circuits for error detection and encryption. GlobalData’s report on Taiwan Semiconductor Manufacturing gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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Taiwan Semiconductor Manufacturing had no grants in cybersecurity as a theme in Q2 2024.
Recent Patents
Application: I/o circuit design for sram-based puf generators (Patent ID: US20240214226A1)
The patent filed by Taiwan Semiconductor Manufacturing Co Ltd. discloses an input/output circuit for a physical unclonable function (PUF) generator circuit. The PUF generator includes a PUF cell array with multiple bit cells arranged in columns and rows, along with input/output circuits connected to neighboring columns. These I/O circuits consist of sense amplifiers without cross-coupled transistors, enabling access to and determination of logical states of bit cells to generate a PUF signature. The I/O circuits are designed with two cross-coupled inverters forming part of a sense amplifier, directly connected to bit lines in the PUF cell array.
The method for generating a PUF signature involves writing a voltage in bit cells, stabilizing the voltage levels, enabling a sense amplifier to read the levels, and determining the PUF signature based on the read values. This process includes specific steps such as turning on pre-charge transistors, access transistors, and pass gates, as well as stabilizing voltage levels by turning off access transistors. The I/O circuits in the PUF generator also incorporate pass gates, pre-discharge transistors, and equalizers to enhance functionality. Additionally, the PUF cell array consists of bit cells with cross-coupled inverters and access transistors, while the I/O circuits feature second cross-coupled inverters directly connected to bit lines, with specific distances between them for efficient operation.
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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
