Teradyne. has been granted a patent for an automated test equipment (ATE) that utilizes power transistors in an inverter configuration. The invention features a programmable impedance off-state circuit path and a negative gate-to-source voltage to mitigate gate voltage glitches, enhancing performance during rapid voltage transients. GlobalData’s report on Teradyne gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Teradyne, Robot path planning was a key innovation area identified from patents. Teradyne's grant share as of July 2024 was 58%. Grant share is based on the ratio of number of grants to total number of patents.
Programmable impedance circuit for power transistor gate control
The patent US12050244B2 describes an automated test equipment (ATE) designed for testing devices under test (DUT), specifically focusing on configurations involving transistors. The ATE includes a first and a second control circuit, each driving a corresponding transistor in an inverter configuration. Each control circuit features a gate line and a source line, with two parallel circuit paths: one for applying a positive voltage and another for a negative voltage to the gate terminal of the transistors. The second circuit path incorporates a programmable resistance, allowing for dynamic adjustments in impedance, which is crucial for effective testing of the DUT.
The claims further detail the operational timing and configurations of the control circuits, including the states of switches and the programmable resistance. The ATE can accommodate various types of transistors, such as insulated-gate bipolar transistors (IGBTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs). The programmable resistance can be adjusted between high and low impedance states, enhancing the versatility of the testing process. Additionally, the ATE includes a device-interface board (DIB) that connects to the DUT, facilitating the interconnection of gate and source terminals. The method outlined in the patent emphasizes the sequential control of the transistors, ensuring precise timing in the application of voltages and the adjustment of resistances, which is essential for accurate testing outcomes.
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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
