SiFive has been granted a patent for systems and methods that automate the generation of integrated circuit designs. The technology allows non-experts to design processors and systems-on-chips (SoCs) based on high-level requirements. It also enables the exploration of the design space through simulation or emulation, easy integration of IP cores from third parties, and delivery of customized processors and SoCs with pre-verification and developer tools. The patent includes a web application server, a controller, and a machine learning-based design iterator to facilitate the automated design process. GlobalData’s report on SiFive gives a 360-degree view of the company including its patenting strategy. Buy the report here.
According to GlobalData’s company profile on SiFive, Vector processing optimization was a key innovation area identified from patents. SiFive's grant share as of September 2023 was 25%. Grant share is based on the ratio of number of grants to total number of patents.
Automated generation of integrated circuit designs and associated data

A recently granted patent (Publication Number: US11748536B2) describes a system for designing integrated circuits using machine learning. The system includes a web application server that generates a data structure containing design parameters based on user input. This data structure is used to display an auto-updating block diagram of a template design that reflects changes to the design parameters. The system also includes a controller that accesses the design parameters data structure and performs various tasks to build the integrated circuit design, such as obtaining a register-transfer level data structure, a software development kit, a physical design data structure, and a test plan.
One of the key features of this system is a machine learning-based design iterator. This component takes as input the values of the design parameters and a feedback signal based on a design criterion and a set of test results. Using this information, the design iterator modifies the design parameters data structure and issues a command to the controller to build a second integrated circuit design based on the modified parameters. Importantly, the design iterator has been trained using prior inputs and feedback signals based on test results obtained by the controller.
The feedback signal used by the design iterator can be based on the difference between a test result and a threshold of the design criterion, or the ratio between a test result and the threshold. This allows the system to iteratively improve the design parameters based on the desired design criterion.
Additionally, the patent describes the use of provenance stamps within the register-transfer level data structure and the physical design data structure. These stamps include metadata that indicate the circumstances of reception of the design data structure used to generate these data structures. The provenance stamps can include cryptographic signatures, hashes, or notarizations, providing a way to track and verify the origin and integrity of the design data.
Overall, this patented system combines web application server technology, a controller, and a machine learning-based design iterator to enable the efficient and iterative design of integrated circuits. The use of provenance stamps adds an extra layer of security and traceability to the design process.
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