Phison Electronics has been granted a patent for a data merging method that improves the efficiency of memory storage devices. The method involves copying and updating logical to physical mapping tables, reducing the number of times the same table is read during data merging. The patent also includes a memory control method for rewritable non-volatile memory modules. GlobalData’s report on Phison Electronics gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Phison Electronics, memory management was a key innovation area identified from patents. Phison Electronics's grant share as of September 2023 was 70%. Grant share is based on the ratio of number of grants to total number of patents.
Data merging method for memory control in non-volatile memory
A recently granted patent (Publication Number: US11755242B2) describes a memory control method for a rewritable non-volatile memory module. The module consists of multiple management units, including a source unit and a recycling unit. The method involves collecting valid data from the source unit and copying a first logical to physical mapping table to generate a second logical to physical mapping table. The second table is updated with mapping information corresponding to the recycling unit. The valid data is then copied from the source unit to the expected physical address of the recycling unit. The method also includes updating the physical address of the first logical to physical mapping table in the first management information to the physical address of the second table.
If a trim command or a command for updating the mapping table of the management units is received while the valid data is not completely copied from the source unit to the recycling unit, the method determines whether a third logical to physical mapping table updated by the command is identical to the first logical to physical mapping table. If they are not identical, the trim command or the command for updating the mapping table is executed separately from the data merging operation.
The patent also describes a memory storage device that includes a connection interface unit, a rewritable non-volatile memory module with management units, and a memory control circuit unit. The memory control circuit unit collects valid data from the source unit, copies the first logical to physical mapping table to generate the second table, and updates it with mapping information corresponding to the recycling unit. It then copies the valid data from the source unit to the expected physical address of the recycling unit and updates the physical address of the first logical to physical mapping table in the first management information to the physical address of the second table.
Similar to the method, if a trim command or a mapping table update command is received while the valid data is not completely copied from the source unit to the recycling unit, the memory control circuit unit determines whether the third logical to physical mapping table is identical to the first table. If they are not identical, the trim command or the mapping table update command is executed separately from the data merging operation.
Overall, this patent presents a memory control method and a memory storage device that efficiently manage data copying and mapping in a rewritable non-volatile memory module, ensuring data integrity and accurate mapping information.
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