Lam Research has been granted a patent for low resistance metallization stack structures designed for logic and memory applications. The patent details methods for fabricating these structures using large grain size transition metal layers and includes a specific process for forming a molybdenum layer followed by a bulk conductive layer. GlobalData’s report on Lam Research gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Lam Research, 3D memory devices was a key innovation area identified from patents. Lam Research's grant share as of July 2024 was 54%. Grant share is based on the ratio of number of grants to total number of patents.
Low resistance metallization stack structures for electronics
The granted patent US12074029B2 outlines a method for forming a conductive layer on a substrate, specifically utilizing molybdenum (Mo) and hydrogen (H2) in a controlled reaction environment. The process begins with the formation of a first Mo layer by exposing the substrate to molybdenum oxychloride and a boron-containing reducing agent. This initial layer can be further enhanced by exposing it to hydrogen, and it is formed using atomic layer deposition (ALD) techniques. The substrate temperature during this process is maintained between 300° C. and 800° C., ensuring optimal conditions for layer formation. The patent specifies that the first Mo layer should be between 1 and 10 nm thick, contain less than 1 atomic percent impurities, and be free of fluorine impurities.
In addition to the first Mo layer, the method allows for the formation of a bulk conductive layer, which can either be a molybdenum layer or tungsten. The claims emphasize the importance of the purity and thickness of the first Mo layer, as well as its placement over a dielectric layer. The use of molybdenum dichloride dioxide (MoO2Cl2) as the molybdenum oxychloride source is also highlighted, indicating a specific chemical pathway for achieving the desired conductive properties. Overall, the patent presents a detailed approach to creating high-quality conductive layers suitable for various applications in semiconductor technology.
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