Micron Technology. has been granted a patent for a method that involves conducting initial and subsequent integrity scans of memory to assess error rates over time. The method includes storing these rates, calculating differences, and selecting appropriate remedial actions based on the findings. GlobalData’s report on Micron Technology gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Micron Technology, 3D memory devices was a key innovation area identified from patents. Micron Technology's grant share as of June 2024 was 68%. Grant share is based on the ratio of number of grants to total number of patents.
Memory integrity scanning and error rate management
The patent US12045130B2 outlines a method and system for managing memory integrity through a series of integrity scans and subsequent remedial actions based on error rates. The process begins with a first integrity scan of a memory subset to establish a baseline error rate, followed by a second scan to determine a subsequent error rate. The differences in error rates and the timing of these scans are analyzed to select appropriate remedial actions. These actions may include reprogramming data to different memory subsets, adjusting the bit density of memory cells, changing the type of data stored, or modifying the frequency of integrity scans. The method also allows for prioritization of remedial actions relative to other memory subsets.
Additionally, the patent specifies that if the second error rate meets a certain threshold, specific remedial actions are triggered, such as reprogramming data. Conversely, if the error rate does not meet the threshold, the memory subset may be added to a high reliability pool. The system is designed to enhance memory reliability by dynamically adjusting to the integrity status of memory subsets, thereby ensuring optimal performance and data integrity. The claims also encompass a non-transitory computer-readable medium that executes the described methods, highlighting the integration of software and hardware in memory management solutions.
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