Onto Innovation has been granted a patent for systems and methods to correct overlay errors in the lithography process for semiconductor chips. The patent describes a method involving adjusting the reticle and stage to minimize overlay errors between different sets of devices on the substrate. This technology can help improve the manufacturing process for chips, particularly in reconstituted substrates, and address issues associated with fan-out wafer-level packaging and fan-out panel-level packaging. GlobalData’s report on Onto Innovation gives a 360-degree view of the company including its patenting strategy. Buy the report here.
According to GlobalData’s company profile on Onto Innovation, defect detection models was a key innovation area identified from patents. Onto Innovation's grant share as of June 2023 was 1%. Grant share is based on the ratio of number of grants to total number of patents.
Method for correcting overlay errors in lithographic process
A recently granted patent (Publication Number: US11687010B2) describes a method and apparatus for correcting overlay errors in a lithographic process. The method involves several steps to minimize overlay errors between a first set of devices and a second set of devices on a substrate.
The method includes exposing the first set of devices on the substrate and then adjusting a reticle in a vertical direction to minimize overlay errors with the second set of devices. This adjustment is based on alignment information associated with the substrate. Additionally, the stage that holds the substrate is adjusted to further minimize overlay errors. Once the reticle and stage adjustments are made, the second set of devices on the substrate is exposed.
The patent also mentions that the reticle adjustment may involve a rotation adjustment theta. Furthermore, a recipe controls the adjustments of the reticle and stage.
In another aspect, the patent describes an apparatus configured to correct overlay errors in a lithographic process. The apparatus includes means for exposing the first set of devices on the substrate, means for adjusting the reticle in a vertical direction, means for adjusting the stage, and means for exposing the second set of devices on the substrate. Similar to the method, the reticle adjustment may involve a rotation adjustment theta, and the means for adjusting the stage makes X and Y adjustments based on the reticle adjustment.
Overall, this patent presents a method and apparatus for effectively correcting overlay errors in a lithographic process. By adjusting the reticle and stage, the method aims to minimize overlay errors between different sets of devices on a substrate. The apparatus provides the necessary means for implementing these adjustments. This technology has the potential to improve the accuracy and quality of lithographic processes, which are widely used in various industries such as semiconductor manufacturing.